منابع مشابه
Dynamically Scheduling VLIW Instructions
Very long instruction word (VLIW) machines potentially provide the most direct way to exploit instruction-level parallelism; however, they cannot be used to emulate current general-purpose instruction set architectures. In addition, programs scheduled for a particular implementation of a VLIW model cannot be guaranteed to be binary compatible with other implementations of the same machine model...
متن کاملDynamically Scheduling VLIW Instructions with Dependency Information
This paper proposes balancing scheduling effort more evenly between the compiler and the processor, by introducing dynamically scheduled Very Long Instruction Word (VLIW) instructions. Dynamically Instruction Scheduled VLIW (DISVLIW) processor is aimed specifically at dynamic scheduling VLIW instructions with dependency information. The DISVLIW processor dynamically schedules each instruction w...
متن کاملPerformance of Dynamically Scheduling VLIW Instructions
compiler to exploit high ILP using EPIC techniques [SI. M-64 processor architecture implementing this concept is the processor architecture where the compiler is responsible for This paper evaluates performance of the Dynamically efficiently exploiting the available ILP and keeps the Inslructian Sch&led KlW P I S w pmcersor mhitechnz. executions busy. Instead of the merits, the IA-64 processor ...
متن کاملDynamically Scheduling the Trace Produced During Program Execution into VLIW Instructions
VLIW machines possibly provide the most direct way to exploit instruction level parallelism; however, they cannot be used to emulate current general-purpose instruction set architectures. Programs scheduled for a particular implementation of a VLIW model cannot be guaranteed to be binary compatible with other implementations of the same machine model with different number of functional-units. T...
متن کاملDynamically Trace Scheduled VLIW Architectures
This paper presents a new architecture organisation, the dynamically trace scheduled VLIW (DTSVLIW), that can be used to implement machines that execute the code of current RISC or CISC instruction set architectures in a VLIW fashion, with backward code compatibility.
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ژورنال
عنوان ژورنال: Journal of Parallel and Distributed Computing
سال: 2000
ISSN: 0743-7315
DOI: 10.1006/jpdc.2000.1661